1 88C196EC IPD Ratio
          Was a when I saw the root cause of a bad Testing Practise that allowed fab 8 
          to Close three months  earlyier as the problem did not allow 25% of the tester 
          to run the main runner product.
       2  Dpac                       :  
          Was the project to change the frequency of the calibration of this module.
       3  Automation            : 
           Probe card damage was fixing of automation that damaged probe cards.

       4  Qrom End Of life     :  
          Was fixing of a old Tester Platform to avoid a "Product Discontinuation Notice "in 2005.
       5   Calibration             :  
           Was the setting up of calibration of the Standard Boards of the Trillium Tester.



                                                   PRIVATE PROJECTS 

      1   Probe Quality check:
          This was private project to check wafer probing. 100% private project no Intel 
           work hours Used.
      2   FPGA Design:  
          The chip  I built in VHDL eamples code for example the 
            RGB pwm controler in VHDL using SRL 

      3   Smt & BGA : 
           My Learning of how to work with Smt&BGA upgrade of my WorkBench to Smt work.
      4   Career Development:
          The private courses between 2004-2008 VHDL Verilog 
      5   Thermography:          
           A project to see if one can detect cancer using a  Simple sensor (Still ongoing )
      6    Power up current Issue 88C196ec.
           In 2004 Intel Launched the 88CO196EC at that time they put out a Spec update
           the only Public Document that the "Jerusalem Automotive Division" Existed.
           I was troubled by the way a report of Hight current Drawn on power up
           by the chip was called a  Observation.I tried to find the root cause.



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